Principal ASIC Design Engineer

Positron.ai specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron exists to create the world's best AI inference systems.

Hiring Requisition : Principal ASIC Design Engineer

Position : Principal ASIC Design Engineer

Company : Positron.ai

Job Type : Full-time

Reports To : Director of ASIC Engineering

Location : Onsite / Hybrid / Remote—your preference

Company Overview

Positron.ai specializes in developing custom hardware systems to accelerate AI inference. Our systems deliver step‑function improvements in performance per dollar and performance per watt versus traditional GPU-centric approaches. We exist to create the world’s best AI inference systems.

Position Overview

As a Principal ASIC Design Engineer, you will provide technical leadership across the full ASIC design lifecycle—owning the architecture, microarchitecture, RTL implementation, and front‑end signoff of major subsystems for Positron.ai’s inference ASICs / SoCs. You will drive architectural decisions, establish best‑in‑class design methodologies, and ensure that all silicon meets aggressive PPA, schedule, and quality targets. This role is both highly technical and strategic : you will shape silicon architecture, mentor engineering teams, and represent ASIC design in cross‑functional and executive discussions.

Key Responsibilities

Architecture & Technical Leadership

• Define system‑level architecture and guide microarchitecture decisions for complex subsystems and cross‑chip fabrics.
• Lead technical scoping, partitioning, and trade‑off analyses across performance, power, and area.

RTL Design & Signoff Ownership

High‑Performance Interface & Memory Integration

Cross‑Functional Influence

Required Qualifications

Preferred Qualifications

Why Join Us?

Interested?

Apply with your resume and a brief note describing a subsystem or architecture you led from concept to tape‑out, highlighting the PPA, methodology, and strategic trade‑offs you drove.

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